1 gps port configuration register-mbar + 0x0b00, Section 7.3.2.1.1, gps port configuration, Register—mbar + 0x0b00 – Freescale Semiconductor MPC5200B User Manual

Page 188: Gps port configuration register, 1 gps port configuration register, Mbar + 0x0b00

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General Purpose I/O (GPIO)

MPC5200B Users Guide, Rev. 1

Freescale Semiconductor

7-29

7.3.2.1.1

GPS Port Configuration Register

MBAR + 0x0B00

Table 7-21. GPS Port Configuration Register

msb 0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

R

CS1

LPT

Z

ALTs

CS7

CS6

ATA

IR_

U

SB_CLK

IRDA

Ether

W

RESET:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31 lsb

R

PCI_DIS

USB_SE

USB

PSC3

Rsvd

PSC2

Rsvd

PSC1

W

RESET:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Bit

Name

Description

0

CS1

Memory Chip Select bit

0 = gpio_wkup_6

1 = mem_cs1 (second SDRAMC chip select) on gpio_wkup_6 pin

1

LPTZ

LocalPlus non-muxed TSIZ bit

0 = gpio_wkup_7 and test_sel_1

1 = TSIZ 1 on gpio_wkup_7 and TSIZ 2 on test_sel_1

2:3

ALTs

Alternatives, see Note

2

00 = No Alternatives: CAN1/2 on PSC2 according to PSC2 setting.

SPI on PSC3 according to PSC3 setting.

01 = ALT CAN position: CAN1 on I2C1, CAN2 on Tmr0/1 pins, see Note 1

10 = ALT SPI position: SPI on Tmr2/3/4/5 pins, see Note

2

11 = Both on ALT

4

CS7

0 = Interrupt GPIO on PSC3_5 (see note 6)

1 = CS7 on PSC3_5

5

CS6

0 = Interrupt GPIO on PSC3_4 (see note 6)

1 = CS6 on PSC3_4

6:7

ATA

Advanced Technology Attachment

00 = No ATA chip selects, csb_4/5 used as normal chip select

01 = ATA cs0/1 on csb_4/5

10 = ATA cs0/1 on i2c2 clk/io

11 = ATA cs0/1 on Tmr0/1, see Note

1

8

IR_USB_CLK

Infrared USB Clock

0 = IrDA/USB 48MHz clock generated internally, pin is GPIO

1 = IrDA/USB clock is sourced externally, input only

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