Chapter 13 bestcomm, 1 overview, 2 bestcomm functional description – Freescale Semiconductor MPC5200B User Manual
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Overview
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor
13-1
Chapter 13
BestComm
13.1
Overview
The following sections are contained in this document:
•
Section 13.2, BestComm Functional Description
•
Section 13.15, BestComm DMA Registers—MBAR+0x1200
•
BestComm provides an efficient, integrated approach to gathering and manipulating data sets from a broad range of communication interfaces.
The DMA controller reduces the workload on the microprocessor, allowing it to continue execution of system software. The DMA microcode
engine is tailored to efficiently transfer data across the internal bus architecture to memory and peripheral devices.
The DMA controller processes microcode tasks that are stored in local memory (SRAM 16 kBytes). A task is a sequence of instructions,
referred to as descriptors, that specifies a series of data movements or manipulations. The DMA controller steps through the descriptors and
executes the specified function in a similar fashion to a CPU executing a program.
For the MPC5200B, BestComm consists of SDMA and the following peripheral interfaces:
•
10/100 Fast Ethernet Controller (FEC)
•
I
2
C
•
PCI
•
ATA
•
LocalPlus
•
PSC - Peripheral Serial Controller (implementing a different mix of functionalities such as SPI, UART, CODEC 8-16-32 bits, AC97
controller, I2S, IrDA controller)
Many of the peripherals’ port pins serve multiple functions, allowing flexibility in optimizing the system to meet a specific set of integration
requirements. For a description of the pin multiplexing scheme and supported functions, refer to
Chapter 2, Signal Descriptions
.
Other peripheral functions are included in MPC5200B, but are not directly supported by BestComm. These peripherals include:
•
A separate Serial Peripheral Interface (SPI), which:
— supports a 6.25MHz rate as a master
— supports a 12.5MHz rate as a slave
•
USB Host/Hub controller
•
MSCAN controller
•
General Purposes Timers
13.2
BestComm Functional Description
The BestComm I/O subsystem consists of the following:
•
a BestComm DMA Controller
•
an on-chip 16 kBytes SRAM
•
a set of peripheral interface modules with DMA controllable:
— transmit (Tx)
— receive (Rx)
The BestComm unit provides an interrupt control and data movement interface. The Interface is on a separate peripheral bus to several on-chip
peripheral functions. This independent control of data movement leaves the e300 core free to concentrate on higher level activities, which
increases overall system performance.
BestComm DMA can control data movement on the following peripherals and interfaces:
•
PCI bus
•
ATA Controller
•
Ethernet
•
PSC
•
I
2
C
•
IrDA
•
LP bus interface