Freescale Semiconductor MPC5200B User Manual
Page 167
MPC5200B Users Guide, Rev. 1
7-8
Freescale Semiconductor
Interrupt Controller
7.2.4.3
ICTL Peripheral Priority and HI/LO Select 2 Register —MBAR + 0x0508
7.2.4.4
ICTL Peripheral Priority and HI/LO Select 3 Register —MBAR + 0x050C
Table 7-6. ICTL Peripheral Priority and HI/LO Select 2 Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Per8_pri
Per9_pri
Per10_pri
Per11_pri
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Per12_pri
Per13_pri
Per14_pri
Per15_pri
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
—
Per[x]_pri
Identical to Peripheral_Priority 1 Register, but related to peripheral interrupt sources 8
through 15. All bits are programmable and significant.
0:3
Per8_pri
Peripheral 8 = PCI Control module
4:7
Per9_pri
Peripheral 9 = PCI SC Initiator RX
8:11
Per10_pri
Peripheral 10 = PCI SC Initiator TX
12:15
Per11_pri
Peripheral 11 = PSC4
16:19
Per12_pri
Peripheral 12 = PSC5
20:23
Per13_pri
Peripheral 13 = SPI modf
24:27
Per14_pri
Peripheral 14 = SPI spif
28:31
Per15_pri
Peripheral 15 = I2C1
Table 7-7. ICTL Peripheral Priority and HI/LO Select 3 Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Per16_pri
Per17_pri
Per18_pri
Per19_pri
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Per20_pri
Per21_pri
Per22_pri
Per23_pri
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
—
Per[x]_pri
Identical to Peripheral_Priority 2 register, but related to peripheral interrupt sources 16–21.
All bits are programmable and significant.
0:3
Per16_pri
Peripheral 16 = I2C2
4:7
Per17_pri
Peripheral 17 = CAN1