9 sdma task control 2 register-mbar + 0x1220, Section 13-9, sdma task control 2 register – Freescale Semiconductor MPC5200B User Manual
Page 443
MPC5200B Users Guide, Rev. 1
13-10
Freescale Semiconductor
BestComm DMA Registers—MBAR+0x1200
13.15.9
SDMA Task Control 2 Register—MBAR + 0x1220
SDMA Task Control 3 Register—MBAR + 0x1222
9
High En
High-Enable - High Priority Task Enable
0 = Normal task enable control
1 = High priority task enable control
This bit can be set or cleared by the programmer at any time. This bit enables the SDMA
to give priority to the enabled task function over running a task. At system reset, this bit is
cleared.
10
Hold
Hold Init Num- Hold initiator number
0 = Allow the SDMA engine to update initiator number for task
1 = Keep current initiator number.
This bit allows the initiator number to be set by the programmer and held for the complete
task. The SDMA can not overwrite the programmed initiator except for the use of the
always initiator which is contained in a separate control bit.
11
—
Reserved
12-15
AS[3:0]
ASNum[3:0] - Auto-Start Task Number
These four bits contain the task number which will be auto-started when the Auto-Start
control bit is set. At system reset, these bits are cleared.
16:31
TCR1
Task control register for task 1. Same bit layout as for TCR0
Table 13-9. SDMA Task Control 2 Register
SDMA Task Control 3 Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCR2
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TCR3
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:15
TCR2
Task control register for task 2. Same bit layout as for TCR0
16:31
TCR3
Task control register for task 3. Same bit layout as for TCR0
Bit
Name
Description