1 cdm jtag id number register-mbar + 0x0200, Cdm jtag id number register—mbar + 0x0200, Cdm power on reset configuration register – Freescale Semiconductor MPC5200B User Manual
Page 145
MPC5200B Users Guide, Rev. 1
5-12
Freescale Semiconductor
CDM Registers
5.5.1
CDM JTAG ID Number Register—MBAR + 0x0200
The CDM JTAG ID Number Register is a read-only register that contains the JTAG Identification number identifying MPC5200B. The value
is hard coded (1001 101D
hex) and cannot be modified.
Device I.D. Register = 1001 101D
hex
5.5.2
CDM Power On Reset Configuration Register—MBAR + 0x0204
This is a mostly read-only register containing the configuration value latched at POR.
Table 5-8. CDM JTAG ID Number Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
JTAG Identification Number Register
W
Unused
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
JTAG Identification Number Register
W
Unused
RESET:
0
0
0
1
0
0
0
0
0
0
0
1
1
1
0
1
Version
Device (MPC5200B
)
Manufacturer (Freescale)
0001
0000 0000 0001 0001
0000 0001 110
1
Table 5-9. CDM Power On Reset Configuration Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Reserved
Write 0
Reserved
Reserved, Read Only
sys_pll
_b
ypass
W
RESET:
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
V
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
boot
_
ram_lf
boot
_
ra
m
_
ty
p
e
boot
_
ra
m
_
s
iz
e
boot
_
ra
m
_
s
w
a
p
boot
_
ra
m
_
w
a
it
pp
c
_
msr
ip
boot
_
ra
m
_
m
g
sys
_pll_
cfg_1
sys
_pll_
cfg_0
xl
b_
clk
_
sel
ppc_pll
_cfg_0
ppc_pll
_cfg_1
ppc_pll
_cfg_2
ppc_pll
_cfg_3
ppc_pll
_cfg_4
W
Reserved, Read Only
RESET:
V
V
V
V
V
V
—
V
V
V
V
V
V
V
V
V
Bit
Name
Description
0–2
—
Reserved for future use. Write 0.
3–7
—
Reserved.
8-14
—
Read Only. Do not write.