Freescale Semiconductor MPC5200B - Manual (Page 269)

MPC5200B Users Guide, Rev. 1
9-4 Freescale Semiconductor
Modes of Operation
Figure 9-2. Muxed Mode Address Latching
9.4 Modes of Operation
There are 2 primary modes of operation:
• MUXed
• non-MUXed (Legacy, Large Flash, Most/Graphic modes, Burst and Non-Burst)
Within each mode, there is considerable flexibility to control the operation.
Each CS can be programmed to a different mode of operation (MUXed, non-MUXed, number of wait states, byte swapping etc.).
The MPC5200B always begins execution from the release of HRESET on the LocalPlus Bus and from the memory device connected to CS0.
If an ATA Disk drive is present in the system, 2 CS signals may be taken up by the ATA interface. The ATA CSs can also be programmed to
appear on other signals. For more information, see
Chapter 11, ATA Controller .
MUXed mode allows devices with a larger address range be attached to the LocalPlus bus. In this mode the same 32-bit local bus presents an
Address in an address tenure and Data in a data tenure, in a multiplexed fashion (similar to PCI protocol).
MUXed mode provides an ALE during the address phase and a TS during a separate data phase. This mode requires external logic to latch
the address during the address tenure. An ACK input is provided and can be asserted to shorten (but not extend) wait states. The MUXed mode
is available for all CSs, including CS0 (i.e., Boot Device).
The LocalPlus Bus on MPC5200B provides an Output Enable signal OE to achieve a complete glue less interface for most devices.
The logic equation for the internal generation of the OE signal is :
OE = CSx + (NOT R/W)
Figure 9-3. Output Enable Signal
MUXed and non MUXed modes support a variety of device configurations and are configurable on a per CS basis.
9.4.1 Non-MUXed Mode
In Non-MUXed mode the 32-bit address/data bus is divided into address and data lines. Eight different partitionings of address and data lines
can be configured.
AD Bus
ALE
DATA[31:0]
ADD[31:7]
CS
ACK
CS
ACK
TSIZ[0:2]
ADD[6:5]
External
Logic
Address
MPC5200
LPC Interface
TS
TS
Bank Bits
AD[31:0]
Peripheral
OE
CSx
R/W