Freescale Semiconductor MPC5200B - Manual (Page 431)

MPC5200B Users Guide, Rev. 1
12-28 Freescale Semiconductor
Host Control (HC) Operational Registers
23 PPS PortPowerStatus (read)—bit reflects the port power status, regardless of the type of power
switching implemented.
If an overcurrent condition is detected, this bit is cleared. HCD sets this bit by writing
SetPortPower or SetGlobalPower. HCD clears this bit by writing ClearPortPower or
ClearGlobalPower. Which power control switches are enabled is determined by
PowerSwitchingMode and PortPortControlMask[NDP].
In global switching mode (PSM=0), only Set/ClearGlobalPower controls this bit.
In per-port power switching (PSM=1), if the PortPowerControlMask[NDP] bit for the port is
set, only Set/ClearPortPower commands are enabled.
If the mask is not set, only Set/ClearGlobalPower commands are enabled.
If port power is disabled, CurrentConnectStatus, PortEnableStatus, PortSuspendStatus, and
PortResetStatus should be reset.
0 = Port power is off
1 = Port power is on
SetPortPower (write)
• Writing causes HCD to set the PortPowerStatus bit.
• Writing 0 has no effect.
If power switching is not supported, this bit always reads ‘1b’.
24:26 — Reserved
27 PRS PortResetStatus (read)—When this bit is set by a write to SetPortReset, port reset signaling
is asserted. When reset is completed, this bit is cleared when PortResetStatusChange is set.
This bit cannot be set if CurrentConnectStatus is cleared.
0 = Port reset signal is not active
1 = Port reset signal is active
SetPortReset (write)
• Writing 1 causes HCD to set port reset signaling.
• Writing 0 has no effect.
If CurrentConnectStatus is cleared, a write does not set PortResetStatus. Instead, it sets
ConnectStatusChange. This notifies the driver that an attempt was made to reset a
disconnected port.
28 POCI PortOverCurrentIndicator (read)—bit is only valid when root hub is configured in such a way
that overcurrent conditions are reported on a per-port basis.
If per-port overcurrent reporting is not supported, this bit is set to 0.
If cleared, all power operations are normal for this port.
If set, an overcurrent condition exists on this port. This bit always reflects the overcurrent input
signal
0 = No overcurrent condition.
1 = Overcurrent condition detected.
ClearSuspendStatus (write)
• Writing 1 causes HC to initiate a resume.
• Writing 0 has no effect.
A resume is initiated only if PSS is set.
Bits Name Description