Chapter 7 system integration unit ( siu ), 1 overview, 2 interrupt controller – Freescale Semiconductor MPC5200B User Manual

Page 160: 1 block description, Chapter 7 system integration unit (siu)

Advertising
background image

Overview

MPC5200B Users Guide, Rev. 1

Freescale Semiconductor

7-1

Chapter 7
System Integration Unit (SIU)

7.1

Overview

The following sections are contained in this document:

Interrupt Controller

, includes:

Interrupt Controller Registers

General Purpose I/O (GPIO)

, includes:

GPIO Standard Registers—MBAR+0x0B00

WakeUp GPIO Registers—MBAR+0x0C00

General Purpose Timers (GPT)

, includes:

GPT Registers—MBAR + 0x0600

Slice Timers

, includes:

SLT Registers—MBAR + 0x0700

Real-Time Clock

, includes:

RTC Interface Registers—MBAR + 0x0800

NOTE

Watchdog timer functions are included in the GPT section.

The System Integration Unit (SIU) controls and support the functions listed above.

7.2

Interrupt Controller

A highly configurable Interrupt Controller directs all interrupt sources to the following e300 core interrupt pins:

core_cint -- critical interrupt

core_smi -- system management interrupt

core_int -- standard interrupt

7.2.1

Block Description

The Interrupt Controller MUXes a variety of interrupt sources to the limited interrupt pins on the e300 core. The interrupt sources and their
descriptions are summarized in

Table 7-1

.

Table 7-1. Interrupt Sources

Source

No.

Description

External IRQ

Interrupts

4

Can be programmed as level or edge sensitive. Provides interrupt requests to
Interrupt Controller for external devices.

Slice Timers

2

“Tick” generators. Suitable for operating system update tick.

General Timers

8

Generates interrupt in Input Capture mode or Internal Timer mode. Timers 6 and 7
can interrupt from NAP/DOZE power-down.

BestComm and

Peripherals

19

Various peripherals are priority programmed and encoded into HI or LO interrupt to
the Interrupt Controller. BestComm Controller interrupt is connected to HI interrupt.

RTC

2

Stopwatch and periodic

WakeUp

8

These are special GPIO pins with WakeUP capability. There are 8 such pins
funneled into one interrupt. The source module is gpio_wkup.

GPIO

8

GPIO pins with simple interrupt capability (not available in power down mode). The
source module is gpio_std.

WatchDog Timer

0

No vector handler, generates

SRESET output indication.

Total

51

Advertising