Freescale Semiconductor MPC5200B - Manual (Page 472)

FEC Memory Map and Registers
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 14-7
14.4.1 Control and Status (CSR) Memory Map
Table 14-6. Module Memory Map
Address Function
000–1FF Control/Status Registers
200–3FF MIB Block Counters, see Table 14-8
400–7FF Reserved
Table 14-7. CSR Counters
Address Mnemonic Name
000 FEC_ID FEC_ID Register
004 IEVENT Interrupt Event Register
008 IMASK Interrupt Enable Register
00C Reserved
010 R_DES_ACTIVE Receive Ring Updated Flag
014 X_DES_ACTIVE Transmit Ring Updated Flag
018-020 Reserved
024 ECNTRL Ethernet Control Register
028-03C Reserved
040 MII_DATA MII Data Register
044 MII_SPEED MII Speed Register
04C-060 Reserved
064 MIB_CONTROL MIB Control/Status Register
068-080 Reserved
084 R_CNTRL Receive Control Register
088 R_HASH Receive Hash
08C-0C0 Reserved
0C4 X_CNTRL Transmit Control Register
0C8-0E0 Reserved
0E4 PADDR1 Physical Address Low
0E8 PADDR2 Physical Address High+ Type Field
0EC OP_PAUSE Opcode + Pause Duration
0F0-114 Reserved
118 IADDR1 Upper 32 bits of individual Hash Table
11C IADDR2 Lower 32 bits of individual Hash Table
120 GADDR1 Upper 32 bits of Group Hash Table
124 GADDR2 Lower 32 bits of Group Hash Table
128-140 Reserved