Freescale Semiconductor MPC5200B - Manual (Page 185)

MPC5200B Users Guide, Rev. 1
7-26 Freescale Semiconductor
General Purpose I/O (GPIO)
7.3.1.1 PSC1 (UART1/AC97/CODEC1)
The PSC1 port has 5 pins with hardware support for:
• CODEC
• UART (4 pins consumed)
• UARTe (expanded with carrier detect input–5 pins consumed)
• AC97
Unused pins can serve as simple GPIOs, with one available as a WakeUp input. For use as AC97, this WakeUp GPIO becomes available. A
special mode is available in which the CD input for UART use can be unused. This makes a WakeUp GPIO available on this port. CODEC
usage makes one simple GPIO available. Use of this port for AC97 consumes all 5 pins and leaves no GPIO available.
Refer to the port-mapping illustrations Figure 2-4 .
7.3.1.2 PSC2 (CAN1/2/UART2/AC97/CODEC2)
The PSC2 port has 5 pins with hardware support for:
• CAN
• CODEC
• UART (4 pins consumed)
• UARTe (expanded with carrier detect input–5 pins consumed)
• AC97
Unused pins can serve as simple GPIOs, with one available as a WakeUp input. For use as AC97, this WakeUp GPIO becomes available. A
special mode is available in which the CD input for UART use can be unused. This makes a WakeUp GPIO available on this port. CODEC
usage makes one simple GPIO available. Use of this port for AC97 consumes all 5 pins and leaves no GPIO available.
Refer to the port-mapping illustrations Figure 2-5 .
7.3.1.3 PSC3 (USB2/CODEC3/SPI/UART3)
The PSC3 port has 10pins with hardware support for:
• CODEC
• Expanded UART (5 pins consumed)
• SPI (4 pins consumed)
• USB secondary port (10 pins consumed)
SPI can simultaneously exist, with no pins leftover for GPIO. Similarly, CODEC or UART can exist with SPI leaving no leftover pins. Unless,
CD input on UART is designated unused, in which case a WakeUp GPIO becomes available. Any unused pins are available for related RS232
GPIO functionality.
Refer to the port-mapping illustrations Figure 2-6 .
7.3.1.4 USB1/RST_CONFIG
This is a 10-bit port dedicated to primary USB. GPIO becomes available only if the USB function is not used. When this occurs, the following
GPIO becomes available:
• 4 Simple GPIO
• 1 Interrupt GPIO
Other pins on this port serve as Reset Configuration inputs.
7.3.1.5 Ethernet/USB2/UART4/5/J1850/RST_CONFIG
This port consists of 8 output data pins and 10 control pins (in ethernet mode). For GPIO grouping these are the EthO and EthI ports,
respectively. The output-only pins (EthO) are also used for input reset configuration data, therefore these pins must act as output only in all
other cases. No peripheral is allowed to overdrive the reset configuration pull-up/pull-down settings. The 8 GPIOs on the EthO port are
therefore output-only, and only available if the pin is otherwise unused (beyond reset config).
NOTE
The ethernet pin, MDIO, is actually an I/O. However, there should be no danger of an external chip
driving this pin during power-up.
This port is configured such that 7-wire Ethernet and a secondary USB port can exist simultanaeouly. This configuration makes available 1
GPIO WakeUp pin.