Freescale Semiconductor MPC5200B - Manual (Page 510)

Initialization Sequence
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 14-45
Non-Octet Error (Dribbling Bits)
— The Ethernet controller handles up to seven dribbling bits when the receive frame terminates nonoctet aligned and it checks
the CRC of the frame on the last octet boundary. If there is a CRC error, then the frame nonoctet aligned (NO) error is reported
in the Receive Frame Status Word . If there is no CRC error, then no error is reported.
CRC Error
— When a CRC error occurs with no dribble bits, the FEC closes the buffer and sets the CR bit in the Receive Frame Status Word.
CRC checking cannot be disabled, but the CRC error can be ignored if checking is not required.
Frame Length Violation
— When the receive frame length exceeds MAX_FL bytes the BABR interrupt will be generated and the LG bit in the end of
frame Receive Frame Status Word will be set. The frame is not truncated (truncation occurs if the frame length exceeds 2047
bytes).
Truncation
— When the receive frame length exceeds 2047 bytes the frame is truncated and the TR bit is set in the receive BD.