Gps gpio simple interrupt data direction register, Gps gpio simple interrupt data value out register – Freescale Semiconductor MPC5200B User Manual

Page 202

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General Purpose I/O (GPIO)

MPC5200B Users Guide, Rev. 1

Freescale Semiconductor

7-43

7.3.2.1.11

GPS GPIO Simple Interrupt Data Direction Register —MBAR + 0x0B28

7.3.2.1.12

GPS GPIO Simple Interrupt Data Value Out Register —MBAR + 0x0B2C

Table 7-31. GPS GPIO Simple Interrupt Data Direction Register

msb 0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

R

SIDDR

Reserved

W

RESET:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31 lsb

R

Reserved

W

RESET:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Bit

Name

Description

0:7

SIDDR

Individual bits to control direction of the pin as GPIO.

bit 0 controls GPIO_SINT_7 (ETH_16 pin)

bit 1 controls GPIO_SINT_6 (ETH_15 pin)

bit 2 controls GPIO_SINT_5 (ETH_14 pin)

bit 3 controls GPIO_SINT_4 (ETH_13 pin)

bit 4 controls GPIO_SINT_3 (USB1_9 pin)

bit 5 controls GPIO_SINT_2 (PSC3_8 pin)

bit 6 controls GPIO_SINT_1 (PSC3_5 pin)

bit 7 controls GPIO_SINT_0 (PSC3_4 pin)

0 = Pin is Input (default)

1 = Pin is Output

8:31

Reserved

Table 7-32. GPS GPIO Simple Interrupt Data Value Out Register

msb 0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

R

SIDVO

Reserved

W

RESET:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31 lsb

R

Reserved

W

RESET:

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

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