Freescale Semiconductor MPC5200B - Manual (Page 556)

PSC Operation Modes
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 15-45
Figure 1-1PSC UART Block Diagram
An internal interrupt request signal (IRQ) is provided to notify the Interrupt Controller of an interrupt condition. The output is the logical NOR
of unmasked
ISR bits. The interrupt level of a PSC module is programmed in the Interrupt Controller in the system integration module:
Chapter 7, System Integration Unit (SIU) . The PSC uses the autovector for the programmed interrupt level.
The PSC can automatically transfer data using the BestComm, rather than interrupting the core. When IMR [FFULL] is 1 and Rx FIFO is full,
it can send an interrupt to a BestComm channel so the FIFO data can be transferred to memory.
Table 15-75 briefly describes the PSC module signals.
NOTE
The terms “assertion” and “negation” are used to avoid confusion between active-low and active-high
signals.
– Asserted indicates a signal is active, independent of the voltage level
– Negated indicates a signal is inactive.
Table 15-75. PSC Signal Description for UART Mode
Signal Description
TxD Transmitter Serial Data Output—TxD is held high (mark condition) when Tx is disabled, idle, or operating
in the local loop-back mode. Data is shifted out on TxD on the falling edge of the clock source, with the least
significant bit (lsb) sent first.
RxD Receiver Serial Data Input—Data received on RxD is sampled on the rising edge of the clock source, with
the lsb received first.
CTS Clear-to-Send—This input can generate an interrupt on a change of state.
RTS Request-to-Send—This output can be programmed to be negated or asserted automatically by either Rx
or Tx. When connected to a transmitter CTS, RTS can control serial data flow.
DCD Data carrier detect Input — In the enhanced UART mode this signal must be assert during the data
transmission.
Port
Receiver
Transmitter
Control
Logic
Rx FIFO
Tx FIFO
Clock
Generation Unit
RxD
TxD
DCD
RTS
CTS
External
Interface
Signals
IPB Clock
IPB
Interface
CommBus
Interface
IRQ
Controller
BestComm
Request
PSC
CSR
{CTUR:CTLR}