Freescale Semiconductor MPC5200B - Manual (Page 507)

MPC5200B Users Guide, Rev. 1
14-42 Freescale Semiconductor
Initialization Sequence
14.9.7 Full-Duplex Flow Control
Full-duplex flow control allows the user to transmit pause frames and to detect received pause frames. Upon detection of a pause frame, MAC
data frame transmission stops for a given pause duration.
To enable pause frame detection, the FEC must operate in full-duplex mode (X_CNTRL.FDEN asserted) and flow control enable
(R_CNTRL.FCE) must be asserted. The FEC detects a pause frame when the fields of the incoming frame match the pause frame
specifications as shown in the table below. In addition, the receive status associated with the frame should indicate that the frame is valid
91:ff:ff:ff:ff:ff 0x23 35
11:ff:ff:ff:ff:ff 0x24 36
31:ff:ff:ff:ff:ff 0x25 37
71:ff:ff:ff:ff:ff 0x26 38
51:ff:ff:ff:ff:ff 0x27 39
7f:ff:ff:ff:ff:ff 0x28 40
4f:ff:ff:ff:ff:ff 0x29 41
1f:ff:ff:ff:ff:ff 0x2a 42
3f:ff:ff:ff:ff:ff 0x2b 43
bf:ff:ff:ff:ff:ff 0x2c 44
9f:ff:ff:ff:ff:ff 0x2d 45
df:ff:ff:ff:ff:ff 0x2e 46
ef:ff:ff:ff:ff:ff 0x2f 47
93:ff:ff:ff:ff:ff 0x30 48
b3:ff:ff:ff:ff:ff 0x31 49
f3:ff:ff:ff:ff:ff 0x32 50
d3:ff:ff:ff:ff:ff 0x33 51
53:ff:ff:ff:ff:ff 0x34 52
73:ff:ff:ff:ff:ff 0x35 53
23:ff:ff:ff:ff:ff 0x36 54
13:ff:ff:ff:ff:ff 0x37 55
3d:ff:ff:ff:ff:ff 0x38 56
0d:ff:ff:ff:ff:ff 0x39 57
5d:ff:ff:ff:ff:ff 0x3a 58
7d:ff:ff:ff:ff:ff 0x3b 59
fd:ff:ff:ff:ff:ff 0x3c 60
dd:ff:ff:ff:ff:ff 0x3d 61
9d:ff:ff:ff:ff:ff 0x3e 62
bd:ff:ff:ff:ff:ff 0x3f 63
Table 14-45. Destination Address to 6-Bit Hash (continued)
48-bit DA 6-bit hash (in hex) hash decimal value