7 rx bytes done counts pcirdcr(r) -mbar + 0x3898 – Freescale Semiconductor MPC5200B User Manual
Page 336
Registers
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor
10-39
10.3.3.2.7
Rx Bytes Done Counts PCIRDCR(R) —MBAR + 0x3898
10.3.3.2.8
Rx Packets Done Counts PCIRPDCR(R) —MBAR + 0x38A0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Last_Word
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
0:31
Last_Word
This status register indicates the last 32-bit data fetched from the FIFO and is designed for
the case in which an abnormal PCI termination has corrupted the integrity of the FIFO data
(for that word).
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Bytes_Done
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Bytes_Done
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
0:31
Bytes_Done
This status register indicates the number of Bytes received since the start of a packet. It is
updated at the end of each successful PCI data beat. For normally terminated packets, the
Bytes_Done value and the Packet_Size values are equal. If continuous mode is active, the
Bytes_Done value reads 0 at the end of a successful packet and the Packets_Done field
is incremented.
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Packets_Done
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Packets_Done
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0