Altera Stratix GX Transceiver - Manual (Page 103)

Altera Corporation 4–21
January 2005 Stratix GX Transceiver User Guide
SONET Mode
Figure 4–15. Inter-Transceiver Line Connections for EP1SGX25 Device
16
IQ0 IQ1 IQ2
Transceiver Block 0
IQ0
IQ1
Global Clocks, I/O Bus, General Routin g
Global Clocks, I/O Bus, General Routin g
Transmitter
PLL
IQ2
/2
4 4
Receiver
PLLs
PLD Global Clocks
Transceiver Block 1
IQ0
IQ1
Global Clocks, I/O Bus, General Routin g
Global Clocks, I/O Bus, General Routin g
Transmitter
PLL
IQ2
/2
4 4
Receiver
PLLs
Transceiver Block 2
IQ0
IQ1
Global Clocks, I/O Bus, General Routin g
Global Clocks, I/O Bus, General Routin g
Transmitter
PLL
IQ2
/2
4 4
Receiver
PLLs
Transceiver Block 3
IQ0
IQ1
Global Clocks, I/O Bus, General Routin g
Global Clocks, I/O Bus, General Routin g
Transmitter
PLL
IQ2
/2
4 4
Receiver
PLLs
refclkb
refclkb
refclkb
refclkb