Altera Stratix GX Transceiver - Manual (Page 197)

Altera Corporation 6–43
January 2005 Stratix GX Transceiver User Guide
GigE Mode
wire [0:0] tx_out = sub_wire2[0:0];
wire [0:0] rx_ctrldetect = sub_wire3[0:0];
wire [7:0] rx_out = sub_wire4[7:0];
wire [0:0] rx_errdetect = sub_wire5[0:0];
wire [0:0] coreclk_out = sub_wire6[0:0];
wire [0:0] rx_syncstatus = sub_wire7[0:0];
altgxbaltgxb_component (
.pll_areset (pll_areset),
.pllenable (pllenable),
.inclk (inclk),
.rx_in (rx_in),
.rx_slpbk (rx_slpbk),
.tx_in (tx_in),
.rxanalogreset (rxanalogreset),
.tx_ctrlenable (tx_ctrlenable),
.rxdigitalreset (rxdigitalreset),
.tx_forcedisparity (tx_forcedisparity),
.txdigitalreset (txdigitalreset),
.rx_disperr (sub_wire0),
.rx_patterndetect (sub_wire1),
.tx_out (sub_wire2),
.rx_ctrldetect (sub_wire3),
.rx_out (sub_wire4),
.rx_errdetect (sub_wire5),
.coreclk_out (sub_wire6),
.rx_syncstatus (sub_wire7));
defparam
altgxb_component.force_disparity_mode = "ON",
altgxb_component.channel_width = 8,
altgxb_component.pll_inclock_period = 7812,
altgxb_component.use_symbol_align = "ON",
altgxb_component.rx_ppm_setting = 1000,
altgxb_component.pll_bandwidth_type = "LOW",
altgxb_component.dwidth_factor = 1,
altgxb_component.number_of_channels = 1,
altgxb_component.vod_ctrl_setting = 1000,
altgxb_component.align_pattern_length = 10,
altgxb_component.use_self_test_mode = "OFF",
altgxb_component.lpm_type = "altgxb",
altgxb_component.use_fifo_mode = "ON",
altgxb_component.use_vod_ctrl_signal = "OFF",
altgxb_component.equalizer_ctrl_setting = 0,
altgxb_component.use_auto_bit_slip = "ON",
altgxb_component.use_rate_match_fifo = "ON",
altgxb_component.signal_threshold_select = 80,
altgxb_component.use_double_data_mode = "OFF",
altgxb_component.use_preemphasis_ctrl_signal =
"OFF",
altgxb_component.protocol = "GIGE",
altgxb_component.clk_out_mode_reference = "ON",
altgxb_component.rx_bandwidth_type = "LOW",
altgxb_component.disparity_mode = "ON",