Altera Stratix GX Transceiver User Manual
Page 4
iv
Altera
Corporation
Contents
Stratix GX Transceiver User Guide
Byte Serializer ................................................................................................................................. 3–17
8B/10B Encoder .............................................................................................................................. 3–17
Basic Mode Channel Clocking ...................................................................................................... 3–20
Basic Mode Inter-Transceiver Block Clocking ........................................................................... 3–24
Basic Mode MegaWizard Plug-In Manager Considerations ................................................... 3–29
Basic Mode altgxb MegaWizard Options ................................................................................... 3–29
Introduction ............................................................................................................................................ 4–1
SONET Mode Receiver Architecture .................................................................................................. 4–2
Word Aligner .................................................................................................................................... 4–2
Byte Deserializer ............................................................................................................................... 4–8
Receiver Phase Compensation FIFO Module ............................................................................. 4–10
Transmitter Phase Compensation FIFO Buffer .......................................................................... 4–11
Byte Serializer ................................................................................................................................. 4–12
SONET Mode Channel Clocking ................................................................................................. 4–12
SONET Mode Inter-Transceiver Block Clocking ....................................................................... 4–17
SONET Mode MegaWizard Considerations .............................................................................. 4–23
SONET Mode altgxb MegaWizard Options ............................................................................... 4–23
Introduction ............................................................................................................................................ 5–1
XAUI Mode Receiver Architecture ..................................................................................................... 5–5
Word Aligner .................................................................................................................................... 5–6
Channel Aligner ............................................................................................................................... 5–9
Rate Matcher ................................................................................................................................... 5–11
8B/10B Decoder .............................................................................................................................. 5–11
PCS - XGMII Code Conversion .................................................................................................... 5–15
Byte Deserializer ............................................................................................................................. 5–15
Receiver Phase Compensation FIFO Module ............................................................................. 5–18
Transmitter Phase Compensation FIFO Module ....................................................................... 5–18
Byte Serializer ................................................................................................................................. 5–19
XGMII Character to PCS Code-Group Mapping ....................................................................... 5–20
8B/10B Encoder .............................................................................................................................. 5–21
XAUI Mode Channel Clocking .................................................................................................... 5–24
XAUI Inter-Transceiver Block Clocking ..................................................................................... 5–28
XAUI Mode MegaWizard Considerations ................................................................................. 5–34
XAUI Mode altgxb MegaWizard Options .................................................................................. 5–34