Altera Stratix GX Transceiver - Manual (Page 164)

6–10 Altera Corporation
Stratix GX Transceiver User Guide January 2005
GigE Mode Receiver Architecture
Figure 6–9. Idle Generation Without /I1/ Ordered Set
Stratix GX devices have a built-in rate matcher that is 12 words deep,
which is a FIFO buffer with control logic. Stratix GX devices implement
rate matching in GigE mode by adding or removing /I2/ ordered sets.
The /I1/ ordered set is not added or removed.
If the rate matching FIFO buffer encounters an almost full condition, an
/I2/
ordered set is deleted, as shown in Figure 6–10 . If the rate matching
FIFO buffer encounters an almost empty condition, an /I2/ ordered set
will be added, as shown in
Figure 6–11 . The position of the /I2/ ordered
set that is added to or deleted from the idle stream varies, depending on
when the rate matcher encounters the almost full or almost empty
condition.
Figure 6–10. Detection of an /I2/ Ordered Set During an Almost Full Condition
clock
tx_out 25Eh 17Ch 289h 17Ch 289h 17Ch 289h 17Ch
GMII Idle
Code Group D30.1- K28.5+ D16.2- K28.5+ D16.2- K28.5+ D16.2- K28.5+
/I2/ /I2/ /I2/ /I2/
289h
D16.2-
/D/ /D/ /D/ /I2/ /I2/ /S/ /D/ /I1/ /D/
/D/ /D/ /S/ /D/ /D/ /D/ /I2/ /I1/ /D/
to Rate Matcher
from Rate Matcher
one /I2/ code removed