Altera Stratix GX Transceiver - Manual (Page 183)

Altera Corporation 6–29
January 2005 Stratix GX Transceiver User Guide
GigE Mode
Figure 6–26 shows the transceiver routing with respect to inter-
transceiver lines for the EP1SGX40G device. This device has an extra
transceiver block (number 4), which is in the middle of all the transceiver
blocks, as illustrated. Be sure to use this information when placing
REFCLKB
pins. (When placing refclkb pins, see Appendix C, REFCLKB
Pin Constraints for information about analog reads and refclkb pin
usage constraints.) For example, if a REFCLKB pin is required to feed a
transmitter PLL using an inter-transceiver line, the REFCLKB pin cannot
be in transceiver block 1, because IQ2 only feeds the receiver PLLs.