Altera Stratix GX Transceiver User Manual
Page 228
9–2
Altera Corporation
Stratix GX Transceiver User Guide
January 2005
USER Reset & Enable Signals
The rxanalogreset signal is a power-down signal and only powers
down the receiver. The analog circuitry is powered down when the
rxanalogreset
signal goes high. Although there is no specific
requirement on the duration of the rxanalogreset signal, Altera lab
experiments have shown that 1 ms is a safe value. If you use the
rxanalogreset
signal to power down the analog circuitry, Altera
recommends that you use the rx_freqlocked signal from the receiver
block to implement your reset logic.
The rxdigitalreset signal resets the digital logic in the receiver
section of the transceiver block. This signal is synchronized within the
transceiver block. The minimum duration required on the
rxdigitalreset
signal is four parallel clock cycles.
The txdigitalreset signal resets the digital logic in the transmitter
section of the transceiver block. This signal is synchronized within the
transceiver block. The minimum duration required on the
txdigitalreset
signal is four parallel clock cycles.
f
If you use REFCLKB pins in your design, refer to
for analog reset (pll_areset, rxanalogreset,
pll_enable
) refclkb usage constraints.
You do not have to use all of the reset and enable signals. If the reset and
power-down signals are not used, they default to their inactive levels.
Under normal operating conditions, you do not have to power down the
transmitter PLL. The PLLs should only be powered down as the last
option because there is a significant delay to recover from a power down
state and return to normal operation.
If the read and write pointers in the phase compensation FIFO buffers
point to the same location, the buffer outputs incorrect data. This can
occur during system initialization. If this occurs, use the digital reset
signals (rxdigitalreset and txdigitalreset) to reset the digital
logic of that channel.
shows the reset and enable signals that are required for the
transceiver blocks.