Altera Stratix GX Transceiver - Manual (Page 142)

5–30 Altera Corporation
Stratix GX Transceiver User Guide January 2005
XAUI Mode Clocking
Figure 5–25. Clocking Scheme in Multi-Channel, Only CORECLK_OUT Is Enabled
XAUI mode applications are typically transceiver block-based. The
previous recommendations are valid in a multi-transceiver block
situation. In a multi-transceiver block situation, data striping across the
channels is common. Skew introduced between transceiver blocks by
passive and active elements of the link must be de-skewed in the PLD
core (channel alignment) to ensure error-free data.
ALTGXB PLD
Transceiver Block 0
Transceiver Block 1
Transceiver Block 2
Transceiver Block 3
coreclk_out[3]
coreclk_out[0]
rx_out[15..0]
coreclk_out[1]
rx_out_1[15..0]
coreclk_out[2]
rx_out_2[15..0]
coreclk_out[3]
rx_out_3[15..0]
Destination Register Logic
FIFO
Buffer
FIFO
Buffer
FIFO
Buffer
FIFO
Buffer
(GX25f)