Agilent Technologies Signal Analyzer N9030a User Manual

Page 130

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3  Programming the Analyzer
STATus Subsystem

you are monitoring more than one device which supports SRQs

you need to have the controller do something else while waiting

you can’t afford the performance penalty inherent to polling

Use polling when:

your programming language/development environment does not support SRQ interrupts

you want to write a simple, single-purpose program and don’t want the added complexity of

setting up an SRQ handler

To monitor a condition:

a.Determine which register contains the bit that reports the condition.

b.Send the unique SCPI query that reads that register.

c.Examine the bit to see if the condition has changed.

You can monitor conditions in different ways.

Check the current instrument hardware and firmware status.

Do this by querying the condition registers which continuously monitor status. These registers
represent the current state of the instrument. Bits in a condition register are updated in real time.
When the condition monitored by a particular bit becomes true, the bit is set to 1. When the
condition becomes false, the bit is reset to 0.

Monitor a particular condition (bit).

You can enable a particular bit(s), using the event enable register. The instrument will then
monitor that particular condition(s). If the bit becomes true (0 to 1 transition) in the event
register, it will stay set until the event register is cleared. Querying the event register allows you to
detect that this condition occurred even if the condition no longer exists. The event register can
only be cleared by querying it or sending the *CLS command.

Monitor a particular type of change in a condition (bit).

The transition registers are preset to register if the condition goes from 0 to 1 (false to true,

or a positive transition).

This can be changed so the selected condition is detected if the bit goes from 1 to 0 (true to

false, or a negative transition).

It can also be set for both types of transitions occurring.

Or it can be set for neither transition. If both transition registers are set to 0 for a particular

bit position, that bit will not be set in the event register for either type of change.

130

Remote Language Compatibility Measurement Application Reference

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