Texas Instruments TMS320C3x - Manual (Page 164)

Indirect Addressing
6-11 Addressing Modes
Example 6–7. Indirect Addressing With Postdisplacement Add and Modify
The address of the operand to fetch is the contents of an auxiliary register (AR n).
After the operand is fetched, the displacement ( disp) is added to the auxiliary
register. The displacement is either an 8-bit unsigned integer contained in the
instruction word or an implied value of 1.
Operation: operand address = AR n
AR n = ARn + disp
Assembler Syntax: *AR n ++ (disp)
Modification Field: 00100
Integer (+)
0
0 31 24 23
Address x x
31
disp 0 0
0
31
8 7
Operand
0...0
AR n
Example 6–8. Indirect Addressing With Postdisplacement Subtract and Modify
The address of the operand to fetch is the contents of an auxiliary register
(AR
n). After the operand is fetched, the displacement (disp) is subtracted from
the auxiliary register. The displacement is either an 8-bit unsigned integer
contained in the instruction word or an implied value of 1.
Operation: operand address = AR n
AR n = ARn – disp
Assembler Syntax: *AR n – – (disp)
Modification Field: 00101
Integer (–)
0
0 31 24 23
Address x x AR n
31
disp 0 0
0
31
8 7
Operand
0...0