Texas Instruments TMS320C3x - Manual (Page 638)

NEGI||STI Parallel NEGI and STI
13-180
Example NEGI *–AR3,R2
|| STI R2,*AR1++
Before Instruction After Instruction
R2 00 0000 0019 R2 00 FFFF FF24
AR1 80 98A5 AR1 80 98A6
AR3 80 982F AR3 80 982F
LUF 0 LUF 0
LV 0 LV 0
UF 0 UF 0
N 0 N 1
Z 0 Z 0
V 0 V 0
C 0 C 1
Data memory
80982Eh 0DC 80982Eh 0DC
8098A5h 0 8098A5h 19
25
220
–220
220
25
Note: Cycle Count
See subsection 8.5.2, Data Loads and Stores, on page 8-24 for the effects
of operand ordering on the cycle count.