Texas Instruments TMS320C3x User Manual

Page 746

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Index

Index-5

carry bit, definition

D-2

carry flag

13-29

central processing unit.

See CPU

circular addressing

6-21–6-25

algorithm

6-23

buffer

6-21–6-25

definition

D-2

FIR filters

6-24

operation

6-23

CLKX pins

12-22

clock mode

timer interrupt

12-13

timer pulse generator

12-7–12-9

clock periods, minor

8-24

compare

floating-point value instruction (CMPF)

13-88

integer instruction (CMPI)

13-92

comparison, feature set

2-27

condition codes and flags

13-1, 13-30, 13-31

condition flag

floating-point underflow

13-29

latched floating-point underflow

13-29

latched overflow

13-29

negative

13-29

overflow

13-29

zero

13-29

conditional delayed branches

compare instructions

7-9

extended-precision registers

7-9

context save/restore, definition

D-2

control register

12-51

control registers, external interface

9-2

expansion bus

9-9–9-15

primary bus

9-7–9-8

conversion

floating-point to integer

5-41–5-42

integer to floating-point

5-43

counter register (timer)

12-3, 12-7

CPU

arbitration

12-63

block diagram

2-7

cycle, definition

D-2

definition

D-2

general

2-6

interrupt

DMA interaction

7-40

latency

7-35

CPU (continued)

processing, block diagram

7-34

processing cycle

7-33

primary registers

2-9

register file

3-2

registers

3-1–3-20

auxiliary (AR7–AR0)

2-10

3-4

block size (BK)

2-11, 3-4

block-repeat (RS, RE)

3-17

data-page pointer (DP)

2-10, 3-4

extended-precision (R7–R0)

2-10, 3-3

I/O flag (IOF)

2-11, 3-16

index (IR1, IR0)

2-10, 3-4

interrupt flag (IF)

2-11, 3-11, 7-32

bits defined

3-13

interrupt-enable (IE)

2-11, 3-9, 7-32

list of

3-2

program-counter (PC)

2-18, 3-18

repeat end-address (RE)

2-11, 3-17, 7-2

repeat start-address (RS)

2-11, 3-17, 7-2

repeat-counter (RC)

2-11, 3-17, 7-2

reserved bits and compatibility

3-19

status (ST)

2-11, 3-5, 7-32, 13-29

system-stack pointer (SP)

2-11, 3-4

transfer, with serial-port transmit pol-

ling

12-43–12-44

D

D0-D31, definition

D-2

data, buses

2-18

data formats

5-1–5-48

floating-point

addition and subtraction

5-32–5-36

conversion to integer

5-41–5-42

floating-point formats

5-4–5-13

conversion between formats

5-12–5-15

extended-precision

5-8–5-9

short

5-5–5-6

single-precision

5-7–5-8

integer

5-2

single-precision

5-2–5-3

unsigned

5-3

integer to floating-point conversion

5-43

normalization using NORM instruc-

tion

5-37–5-38

rounding with RND instruction

5-39–5-40

unsigned-integer formats, single-preci-

sion

5-3–5-5

data memory, TMS320C32

2-20

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