Texas Instruments TMS320C3x - Manual (Page 466)

Instruction Set
13-8
Table 13–7. Parallel Instructions (Continued)
(b) Parallel load instructions
Mnemonic Description
LDF
|| LDF
Load floating-point value
LDI
|| LDI
Load integer
(c) Parallel multiply and add/subtract instructions
Mnemonic Description
MPYF3
|| ADDF3
Multiply and add floating-point value
MPYF3
|| SUBF3
Multiply and subtract floating-point value
MPYI3
|| ADDI3
Multiply and add integer
MPYI3
|| SUBI3
Multiply and subtract integer
These parallel instructions have been enhanced on the following devices:
- ’C31 silicon revision 6.0 or greater
- ’C32 silicon revision 2.0 or greater
These devices support greater combinations of operands by also allowing the
use of any CPU register whenever an indirect operand is required. The particular
instruction description details the operand combination.
To support these new modes, you need to invoke the TMS320 floating-point
code generation tools (version 5.0 or later) with the following switches:
- C Compiler
J ‘C31: CL30 –v31 –gsrev6
J ‘C32: CL30 –v32 –gsrev2
- Assembler
J ‘C31: asm30 –v31 –msrev6
J ‘C32: asm30 –v32 –msrev2