Texas Instruments TMS320C3x - Manual (Page 397)

Serial Ports
12-18
Figure 12–13. Serial-Port Global-Control Register
28
RRESET RTINT XINT XTINT
31 30 29 27 26 25 24 23 22 21 20 19 18 17 16
RLEN XLEN FSRP FSXP
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
CLKXP RFSM XFSM
RCLK XCLK
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
HS
RSR XSR
FSXOUT XRDY RRDY
SRCE SRCE FULL EMPTY
R/W R/W R/W R/W R/W R/W R R R/W R R
XRESET RINT
R/W
DRP DXP CLKRP RVAREN XVAREN
R/W R/W R/W R/W R/W
xx xx xx xx
Notes: 1) R = read, W = write
2) xx = reserved bit, read as 0
Table 12–2. Serial-Port Global-Control Register Bits Summary
Abbreviation
Reset
Value Name Description
RRDY 0 Receive ready flag If RRDY = 1, the receive buffer has new data and is ready to
be read. A three H1/H3 cycle delay occurs from the loading
of DRR to RRDY = 1. The rising edge of this signal sets RINT.
If RRDY = 0, the receive buffer does not have new data since
the last read. RRDY = 0 at reset and after the receive buffer is
read.
XRDY 1 Transmit ready flag If XRDY = 1, the transmit buffer has written the last bit of data
to the shifter and is ready for a new word. A three H1/H3 cycle
delay occurs from the loading of the transmit shifter until
XRDY is set to 1. The rising edge of this signal sets XINT.
If XRDY = 0, the transmit buffer has not written the last bit of
data to the transmit shifter and is not ready for a new word.
FSXOUT Transmit frame sync
configuration FSXOUT = 0 configures the FSX pin as an input.
FSXOUT = 1 configures the FSX pin as an output.
XSREMPTY 0 Transmit-shift
register empty flag If XSREMPTY = 0, the transmit-shift register is empty.
If XSREMPTY = 1, the transmit-shift register is not empty.
Reset or XRESET causes this bit to = 0.
RSRFULL 0 Receive-shift register
full flag If RSRFULL = 1, an overrun of the receiver has occurred. In
continuous mode, RSRFULL is set to 1 when both RSR and
DRR are full. In noncontinuous mode, RSRFULL is set to 1
when RSR and DRR are full and a new FSR is received. A read
causes this bit to be set to 0. This bit can be set to 0 only by a
system reset, a serial-port receive reset (RRESET = 1), or a
read. When the receiver tries to set RSRFULL to 1 at the same
time that the global register is read, the receiver dominates,
and RSRFULL is set to 1.
If RSRFULL = 0, no overrun of the receiver has occurred.