Texas Instruments TMS320C3x - Manual (Page 561)

Integer-to-Floating-Point Conversion FLOAT
13-103 Assembly Language Instructions
Syntax FLOAT src, dst
Operation float (src)
→
dst
Operands src general addressing modes (G):
0 0 register (R n, 0
≤
n
≤
27)
0 1 direct
1 0 indirect (disp = 0–255, IR0, IR1)
1 1 immediate
dst register (Rn, 0
≤
n
≤
7)
Opcode
31 24 23 16 8 7 0 15
0 0 0 0 0 1 src 0 dst G 1 1
Description The integer operand src is converted to the floating-point value equal to it; the
result is loaded into the dst register. The src operand is assumed to be a signed
integer; the dst operand is assumed to be a floating-point number.
Cycles 1
Status Bits These condition flags are modified only if the destination register is R7 – R0.
LUF Unaffected
LV Unaffected
UF 0
N 1 if a negative result is generated; 0 otherwise
Z 1 if a 0 result is generated; 0 otherwise
V 0
C Unaffected
OVM Operation is not affected by OVM bit value. Mode Bit