Texas Instruments TMS320C3x - Manual (Page 85)

Memory
4-3 Memory and the Instruction Cache
- Microcomputer Mode
In microcomputer mode, the 4K on-chip ROM is mapped into locations
0h–0FFFh. There are 192 locations (0h–0BFh) within this block for interrupt
vectors, trap vectors, and a reserved space (’C30). Locations 1000h–
7FFFFFh are accessed over the external memory port (STRB active).
Section 4.1.2, Peripheral Bus Memory Map, on page 4-9 describes the peripheral
memory maps in greater detail and Section 4.2, Reset/Interrupt/Trap Vector Map,
on page 4-14 provides the vector locations for reset, interrupts, and traps.
Be careful! Access to a reserved area produces unpredictable
results.