Texas Instruments TMS320C3x - Manual (Page 671)

Signal, Interlocked SIGI
13-213 Assembly Language Instructions
Syntax SIGI
Operation Signal interlocked operation.
Wait for interlock acknowledge.
Clear interlock.
Operands None
Opcode
31 24 23 16 8 7 0 15
0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Description An interlocked operation is signaled over XF0 and XF1. After the interlocked
operation is acknowledged, the interlocked operation ends. SIGI ignores the
external ready signals. Refer to Section 7.4,
Interlocked Operations, on page
7-13 for detailed information.
Cycles 1
Status Bits LUF Unaffected
LV Unaffected
UF Unaffected
N Unaffected
Z
Unaffected
V Unaffected
C Unaffected
OVM Operation is not affected by OVM bit value.
Example SIGI ; The processor sets XF0 to 0, idles
; until XF1 is set to 0, and then
; sets XF0 to 1.
Mode Bit