Texas Instruments TMS320C3x - Manual (Page 667)

Repeat Block RPTB
13-209 Assembly Language Instructions
Syntax RPTB src
Operation src
→
RE
1
→
ST (RM)
Next PC
→
RS
Operands src long-immediate addressing mode
Opcode
31 24 23 16 8 7 0 15
0 1 1 0 0 0 0 1 src
Description RPTB allows a block of instructions to be repeated RC register + 1 times with-
out any penalty for looping. This instruction activates the block repeat mode
of updating the PC. The
src operand is a 24-bit unsigned immediate value that
is loaded into the repeat end-address (RE) register. A 1 is written into the re-
peat mode bit of status register ST (RM) to indicate that the PC is being up-
dated in the repeat mode. The address of the next instruction is loaded into the
repeat start-address (RS) register.
RE should be greater than or equal to RS (RE
w
RS). Otherwise, the code
does not repeat, even though the RM bit remains set to 1.
Cycles 4
Status Bits LUF Unaffected
LV Unaffected
UF Unaffected
N Unaffected
Z
Unaffected
V Unaffected
C Unaffected
OVM Operation is not affected by OVM bit value. Mode Bit