Texas Instruments TMS320C3x - Manual (Page 421)

Serial Ports
12-42
12.2.14.1 Handshake Mode Example
When using the handshake mode, the transmit (FSX/DS/CLKX) and receive
(FSR/DR/CLKR) signals transmit and receive data, respectively. Even if the
’C3x serial port is receiving data only with handshake mode, the transmit signals
are still needed to transmit the acknowledge signal. Example 12–3 shows the
serial-port register setup for the ’C3x serial-port handshake communication, as
shown in Figure 12–25 on page 12-34.
Example 12–3. Serial-Port Register Setup #1
Global control = 011x0x0xxxx00000000xx01100100b,
Transmit port control = 0111h
Receive port control = 0111h
S_port timer control = 0Fh
S_port timer count = 0h
S_port timer period
≥
01h (if two C3xs have the same system clock).
Note: x = user-configurable
Since FSX is set as an output and continuous mode is disabled when hand-
shake mode is selected, follow these steps:
1) Set the XFSM and RFSM bits to 0 and the FSXOUT bit to 1 in the global-
control register.
2) Set the XRESET, RRESET, and HS bits to 1 in order to start the handshake
communication.
3) Set the polarity of the serial-port pins active (high) for simplification.
4) Although the CLKX/CLKR can be set as either input or output, set the
CLKX as output and the CLKR as input.
The rest of the bits are user-configurable as long as both serial ports have
consistent setup.
You need the serial-port timer only if the CLKX or CLKR is configured as an
output. Since only the CLKX is configured as an output, set the timer control
register to 0Fh. When you use the serial-port timer, set the serial timer register
to the proper value for the clock speed. The serial-port timer clock speed setup
is similar to the ’C3x timer. Refer to Section 12.1,
Timers, on page 12-2 for
detailed information on timer clock generation.
The maximum clock frequency for serial transfers is f(CLKIN)/4 if the internal
clock is used and f(CLKIN)/5.2 if an external clock is used. If two ’C3xs have
the same system clock, the timer-period register should be set equal to or
greater than 1, which makes the clock frequency equal to f(CLKIN)/8.