Texas Instruments TMS320C3x - Manual (Page 472)

Instruction Set Summary
13-14
Table 13–8. Instruction Set Summary (Continued)
Mnemonic Operation Description
NOP No operation Modify AR n if specified
NORM Normalize floating-point value Normalize ( src)
→
R n
NOT Bitwise-logical complement src
→
Dreg
OR Bitwise-logical OR Dreg OR src
→
Dreg
OR3 Bitwise-logical OR (3-operand) src1 OR src2
→
Dreg
POP Pop integer from stack *SP– –
→
Dreg
POPF Pop floating-point value from stack *SP– –
→
R n
PUSH Push integer on stack Sreg
→
*++ SP
PUSHF Push floating-point value on stack R n
→
*++ SP
RETI cond Return from interrupt conditionally If cond = true or missing:
*SP– –
→
PC
1
→
ST (GIE)
Else, continue
RETS cond Return from subroutine conditionally If cond = true or missing:
*SP– –
→
PC
Else, continue
RND Round floating-point value Round ( src)
→
R n
ROL Rotate left Dreg rotated left 1 bit
→
Dreg
ROLC Rotate left through carry Dreg rotated left 1 bit through carry
→
Dreg
ROR Rotate right Dreg rotated right 1 bit
→
Dreg
RORC Rotate right through carry Dreg rotated right 1 bit through carry
→
Dreg
Legend: AR n auxiliary register n (AR7–AR0) RE repeat interrupt register
C carry bit RM repeat mode bit
C src conditional-branch addressing modes R n register address (R7–R0)
count shift value (general addressing modes) RS repeat start register
cond condition code SP stack pointer
Daddr destination memory address Sreg register address (any register)
Dreg register address (any register) ST status register
GIE global interrupt enable register src general addressing modes
N any trap vector 0–27 src1 3-operand addressing modes
PC program counter src2 3-operand addressing modes
RC repeat counter register TOS top of stack