Texas Instruments TMS320C3x - Manual (Page 50)

Memory Organization
2-14
Figure 2–5. Memory Organization of the TMS320C30
RDY
HOLD
HOLDA
STRB
R/W
D31–D0
A23–A0
XRDY
MSTRB
IOSTRB
XR/W
XD31–XD0
XA12–XA0
DMAADDR bus
DMADATA bus
DADDR2 bus
DADDR1 bus
DDATA bus
PADDR bus
PDATA bus
Program counter/
instruction register CPU
DMA
controller
32 24 24 32 24 24 32
32 24 32 24 24 32 24
32
Peripheral bus
Multiplexer Multiplexer
Cache
(64 32)
RAM
block 0
(1K 32)
RAM
block 1
(1K 32)
ЙЙЙЙЙ
ЙЙЙЙЙ
ЙЙЙЙЙ
ЙЙЙЙЙ
ЙЙЙЙЙ
ЙЙЙЙЙ
ROM block
(4K 32)