Texas Instruments TMS320C3x - Manual (Page 77)

CPU Multiport Register File
3-14
3.1.9.1 Interrupt-Trap Table Pointer (ITTP)
Similar to the rest of the ‘C3x device family, the ’C32’s reset vector location
remains at address 0. However, the interrupt and trap vectors are relocatable.
This is achieved by the interrupt-trap table pointer (ITTP) bit field in the CPU
interrupt flag register, shown in Figure 3–9. The ITTP bit field dictates the
starting location (base) of the interrupt-trap vector table. This base address
is formed by left shifting by eight bits the value of the ITTP bit field. This shifted
value is called the effective base address and is referenced as EA[ITTP], as
shown in Figure 3–10. Therefore, the location of an interrupt or trap vector
is given by the addition of the effective base address formed by the ITTP bit
field (EA[ITTP]) and the offset of the interrupt or trap vector in the interrupt-
trap vector table, as shown in Figure 3–11. For example, if the ITTP contains
the value 100h, the serial port transmit interrupt vector is located at 10005h.
Note that the vectors stored in the interrupt-trap vector table are the addresses
of the start of the respective interrupt and trap routines. Furthermore, the
interrupt-trap vector table must lie on a 256-word boundary, since the eight
LSBs of the effective base address of the interrupt-trap vector table are 0.
See Section 7.6, Interrupts, on page 7-26 for more information on interrupt
vector tables.
Figure 3–10. Effective Base Address of the Interrupt-Trap Vector Table
Bits 31 – 16 of the CPU interrupt flag register 00000000
7 0 8 23
EA[ITTP] =