Callcond – Texas Instruments TMS320C3x User Manual
Page 544
CALLcond
Call Subroutine Conditionally
13-86
Syntax
CALL
cond src
Operation
If
cond is true:
Next PC
→
*++SP
If
src is in register addressing mode (Rn, 0
≤
n
≤
27),
src
→
PC.
If
src is in PC-relative mode (label or address),
displacement + PC + 1
→
PC.
Else, continue
Operands
src conditional-branch addressing modes (B):
0
register
1
PC relative
Opcode
31
24 23
16
8 7
0
15
0 1 1 1 0
B
0
Register or displacement
cond
0 0 0
0
Description
A call is performed if the condition is true. If the condition is true, the next PC
value is pushed onto the system stack. If the
src operand is expressed in regis-
ter addressing mode, the contents of the specified register are loaded into the
PC. If the
src operand is expressed in PC-relative mode, the assembler gener-
ates a displacement: displacement = label – (PC of call instruction + 1). This
displacement is stored as a 16-bit signed integer in the 16 LSBs of the call in-
struction word. This displacement is added to the PC of the call instruction plus
1 to generate the new PC. This instruction flushes the pipeline as shown in
Example 8–13 on page 8-18.
The ’C3x provides 20 condition codes that can be used with this instruction
(see Table 13–12 on page 13-30 for a list of condition mnemonics, condition
codes, and flags). Condition flags are set on a previous instruction only when
the destination register is one of the extended-precision registers (R7–R0) or
when one of the compare instructions (CMPF, CMPF3, CMPI, CMPI3, TSTB,
or TSTB3) is executed.
Cycles
5
Status Bits
LUF
Unaffected
LV
Unaffected
UF
Unaffected
N
Unaffected
Z
Unaffected
V
Unaffected
C
Unaffected
OVM
Operation is not affected by OVM bit value.
Mode Bit