Texas Instruments TMS320C3x - Manual (Page 428)

DMA Controller
12-49 Peripherals
12.3.1.1 TMS320C30 and TMS320C31 DMA Controller
The ’C30 and ’C31 have an on-chip direct memory access (DMA) controller
that reduces the need for the CPU to perform input/output functions. The DMA
controller can perform input/output operations without interfering with the
operation of the CPU. Therefore, it is possible to interface the ’C30 and ’C31
to slow external memories and peripherals (A/Ds, serial ports, etc.) without
reducing the computational throughput of the CPU. The result is improved sys-
tem performance and decreased system cost.
12.3.1.2 TMS320C32 Two-Channel DMA Controller
The ’C32 has an improved DMA that supports two channels and configurable
priorities. The next sections discuss the new features.
The ’C32 has a two-channel (channel 0 and channel 1) DMA instead of a one-
channel DMA as in the ’C30/’C31 devices. The ’C32’s DMA functions similarly
to that of the ’C30/’C31 DMA but with the addition of DMA/CPU priority scheme
and inter-DMA priority mode. Although the ’C32 CPU supports both floating-
point and integer data access with different data size from the external
memory, the ’C32’s DMA transfer is strictly an integer data transfer. The integer
data access of the ’C32 DMA is the same as the CPU integer data access —
32-bit internal and data size conversion at the external memory interface port.