Texas Instruments TMS320C3x - Manual (Page 191)

Repeat Modes
7-7 Program Flow Control
Example 7–4. Incorrectly Placed Delayed Branch
LDI 15,RC ; Load repeat counter with 15
RPTB ENDLOOP ; Execute block of code
STLOOP ; from STLOOP to ENDLOOP 16
; times
.
.
.
BRD
OOPS ; This branch violates rule 2
ADDF
MPYF
ENDLOOP SUBF
7.1.6 RC Register Value After Repeat Mode Completes
For the RPTB instruction, the RC register normally decrements to 0000 0000h
unless the block size is 1; in which case, it decrements to FFFF FFFFh. However,
if the RPTB instruction using a block size of 1 has a pipeline conflict in the instruc-
tion being executed, the RC register decrements to 0000 0000h. Example 7–5
illustrates a pipeline conflict. See Chapter 8 for pipeline information.
RPTS normally decrements the RC register to FFFF FFFFh. However, if the
RPTS has a pipeline conflict on the last cycle, the RC register decrements to
0000 0000h.
Note: Number of Repetitions
In any case, the number of repetitions is always RC + 1.
Example 7–5. Pipeline Conflict in an RPTB Instruction
EDC .word 40000000h ; The program is located in 4000000Fh
LDP EDC
LDI @EDC,AR0
LDI 15,RC ; Load repeat counter with 15
RPTB ENDLOOP ; Execute block of code
ENDLOOP LDI *AR0,R0 ; The *AR0 read conflicts with
; the instruction fetching
; Then RC decrements to 0
; If cache is enabled, RC decrements
; to FFFF FFFFh