Iack – Texas Instruments TMS320C3x User Manual

Page 565

Advertising
background image

Interrupt Acknowledge

IACK

13-107

Assembly Language Instructions

Syntax

IACK

src

Operation

Perform a dummy read operation with IACK = 0.
At end of dummy read, set IACK to 1.

Operands

src general addressing modes (G):

0 1

direct

1 0

indirect

Opcode

31

24 23

16

8 7

0

15

0 0 0 1 1

1

src

1

G

0

0

0 0 0 0 0

Description

A dummy read operation is performed if off-chip memory is specified. IACK is
set to 0, regardless of

src location, a half H1 cycle after the beginning of the

decode phase of the IACK instruction. At the first half of the H1 cycle of the
completion of the dummy read, IACK is set to 1. The IACK signal will not be
extended due to multicycle reads with wait states. This instruction can be used
to generate an external interrupt acknowledge. The IACK signal and the ad-
dress can be used to signal interrupt acknowledge to external devices. The
data read by the processor is unused.

Cycles

1

Status Bits

LUF

Unaffected

LV

Unaffected

UF

Unaffected

N

Unaffected

Z

Unaffected

V

Unaffected

C

Unaffected

OVM

Operation is not affected by OVM bit value.

Mode Bit

Advertising