Texas Instruments TMS320C3x - Manual (Page 398)

Serial Ports
12-19 Peripherals
Table 12–2. Serial-Port Global-Control Register Bits Summary (Continued)
Abbreviation Description Name
Reset
Value
HS 0 Handshake If HS = 1, the handshake mode is enabled.
If HS = 0, the handshake mode is disabled.
XCLK SRCE 0 Transmit clock
source If XCLK SRCE = 1, the internal transmit clock is used.
If XCLK SRCE = 0, the external transmit clock is used.
RCLK SRCE 0 Receive clock
source If RCLK SRCE = 1, the internal receive clock is used.
If RCLK SRCE = 0, the external receive clock is used.
XVAREN 0 Transmit data rate
mode Specifies a fixed or variable data rate mode when transmitting.
With a fixed data rate, FSX is active for at least one XCLK
cycle and then goes inactive before transmission begins.
With variable data rate, FSX is active while all bits are being
transmitted. When you use an external FSX and variable data
rate signaling, the DX pin is driven by the transmitter when
FSX is held active or when a word is being shifted out.
RVAREN 0 Receive data rate
mode Specifies a fixed or variable data rate mode when receiving.
If RVAREN = 0 (fixed data rate), FSX is active for at least one
RCLK cycle and then goes inactive before reception begins.
If RVAREN = 1 (controlled data rate), FSX is active while all
bits are being received.
XFSM 0 Transmit frame
sync mode Configures the port for continuous mode operation or standard
mode operation.
If XFSM = 1 (continuous mode), only the first word of a block
generates a sync pulse, and the rest are transmitted continuously
to the end of the block.
If XFSM = 0 (standard mode), each word has an associated
sync pulse.
RFSM 0 Receive frame
sync mode Configures the port for continuous mode operation or standard
mode operation.
If RFSM = 1 (continuous mode), only the first word of a block
generates a sync pulse, and the rest are received continuously
to the end of the block.
If RFSM = 0 (standard mode), each word received has an
associated sync pulse.
CLKXP CLKX polarity If CLKXP = 0, CLKX is active high.
If CLKXP = 1, CLKX is active low.