Reticond – Texas Instruments TMS320C3x User Manual

Page 656

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RETIcond

Return From Interrupt Conditionally

13-198

Syntax

RETI

cond

Operation

If

cond is true:

*SP – –

PC

1

ST (GIE).

Else, continue.

Operands

None

Opcode

31

24 23

16

8 7

0

15

0 1 1 1 1

0

0

0

0

cond

0

0 0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

Description

A conditional return is performed. If the condition is true, the top of the stack
is popped to the PC, and a 1 is written to the global interrupt enable (GIE) bit
of the status register. This has the effect of enabling all interrupts for which the
corresponding interrupt enable bit is a 1.

The ’C3x provides 20 condition codes that can be used with this instruction
(see Table 13–12 on page 13-30 for a list of condition mnemonics, condition
codes, and flags). Condition flags are set on a previous instruction only when
the destination register is one of the extended-precision registers (R7–R0) or
when one of the compare instructions (CMPF, CMPF3, CMPI, CMPI3, TSTB,
or TSTB3) is executed.

Cycles

4

Status Bits

LUF

Unaffected

LV

Unaffected

UF

Unaffected

N Unaffected
Z

Unaffected

V

Unaffected

C

Unaffected

OVM

Operation is not affected by OVM bit value.

Mode Bit

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