Fixed data-rate timing operation, Figure 12–26. fixed burst mode – Texas Instruments TMS320C3x User Manual

Page 415

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Serial Ports

12-36

12.2.12.1 Fixed Data-Rate Timing Operation

Fixed data-rate serial-port transfers can occur in two varieties: burst mode and
continuous mode. In burst mode, transfers of single words are separated by
periods of inactivity on the serial port. In continuous mode, there are no gaps
between successive word transfers; the first bit of a new word is transferred
on the next CLKX/R pulse following the last bit of the previous word. This occurs
continuously until the process is terminated. The following variations are
included in fixed data-rate timing operations.

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Fixed Burst Mode

In burst mode with fixed data-rate timing, FSX/FSR pulses initiate transfers,
and each transfer involves a single word. With an internally generated FSX
(see Figure 12–26), transmission is initiated by loading DXR. In this mode,
there is a delay of approximately 2.5 CLKX cycles (depending on CLKX and
H1 frequencies) from the time DXR is loaded until FSX occurs. With an
external FSX, the FSX pulse initiates the transfer, and the 2.5-cycle delay
effectively becomes a setup requirement for loading DXR with respect to
FSX. In this case, you must load DXR no later than three CLKX cycles before
FSX occurs. Once the XSR is loaded from the DXR, an XINT is generated.

Figure 12–26. Fixed Burst Mode

DXR loaded

XINT

RINT

A1

AN

CLKX/R

FSR/FSX (external)

FSX (internal)

DX/DR

R/XVAREN = 0

R/XFSM = 0

In receive operations, once a transfer is initiated, FSR is ignored until the
last bit. For burst-mode transfers, FSR must be low during the last bit, or
another transfer will be initiated. After a full word has been received and
transferred to the DRR, an RINT is generated.

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Fixed Standard Mode

In fixed data-rate mode, you can perform continuous transfers even if
R/XFSM = 0, as long as properly timed frame synchronization is provided,
or as long as DXR is reloaded each cycle with an internally generated FSX
(see Figure 12–27).

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