Texas Instruments TMS320C3x - Manual (Page 93)

Memory
4-11 Memory and the Instruction Cache
4.1.2.2 TMS320C31 Peripheral Bus Memory Map
The ’C31 memory-mapped peripheral registers are located starting at address
808000h. Figure 4–5 shows the peripheral bus memory map. The shaded
blocks are reserved.
Figure 4–5. TMS320C31 Peripheral Bus Memory-Mapped Registers
808064h Primary-bus control
80804Ch Serial port data receive
808048h Serial port data transmit
FSR/DR/CLKR serial port control
808046h Serial port R/X timer period
808045h Serial port R/X timer counter
808044h Serial port R/X timer control
808043h
808042h FSX/DX/CLKX serial port control
Serial port global control 808040h
Timer 1 period register 808038h
Timer 1 counter 808034h
Timer 1 global control 808030h
Timer 0 period 808028h
Timer 0 counter 808024h
Timer 0 global control 808020h
DMA transfer counter 808008h
DMA destination address 808006h
DMA source address 808004h
808000h DMA global control