Texas Instruments TMS320C3x - Manual (Page 728)

Boot-Loader Source Code Listing
C-5 TMS320C32 Boot Loader Source Code
* that to function properly, the boot loader program always expects 32-bit
* data from 32-bit wide memory during the boot load operation. Valid boot
* EPROM widths are : 1, 2, 4, 8, 16 and 32 bits.
*
* 5. A single source block cannot cross STRB boundaries. For example, its
* destination cannot overlap STRB0 space and IOSTRB space. Additionally, all
* of the destination addresses of a single source block should reside in
* physical memory of the same width. It is also not permitted to mix prg and
* data in the same source block.
*
* 6. The boot loader stops boot operation when it finds 0 in the block size
* control word. Therefore, each boot table should always end with a 0,
* prompting the boot loader to branch to the first address of the first block
* and start program execution from that location.
*
*================================================================================*
* C32 boot loader program register assignments, and altered mem locations
*================================================================================*
*
* AR7 – peripheral memory map IOF – XF0 (handshake O)
* AR0 – read cntrl data subr pointer IOF – XF1 (handshake I)
* AR1 – read block data/prg subr pointer
*
* R2 – read STRB value R4 – write STRB value
* AR2 – read STRB pointer AR4 – write STRB pointer
* AR3 – read data/prg pointer AR5 – write data/prg pointer
*
* read ––> R1 ––> write
*
* IR0 – EXEC start flag stack – 808024h – TIM0 cnt reg
* IR1 – EXEC start address 808028h – TIM0 per reg
* IOSTRB – 808004h – DMA0 dst reg
* R3 – data SIZE STRB0 – 808006h – DMA0 dst reg
* R5 – mem WIDTH STRB1 – 808008h – DMA0 cnt reg
*
* R6 – memory read value AR6,R7,R0,BK – scratch registers
*
*================================================================================*
reset .word start ; reset vector
.space 44h ; program starts @45h
*================================================================================*
* Init registers : 808000h ––> AR7, 808023h ––> SP, –1 ––> IR0
*================================================================================*
start LDI 4040h,AR7 ; load peripheral memory map
LSH 9,AR7 ; base address = 808000h
LDI 23h,SP ; initialize stack pointer to
OR AR7,SP ; 808023h (timer counter – 1)
LDI –1,IR0 ; reset exec start addr flag
*================================================================================*