Pc-relative addressing – Texas Instruments TMS320C3x User Manual

Page 172

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PC-Relative Addressing

6-19

Addressing Modes

6.6

PC-Relative Addressing

Program counter (PC)-relative addressing is used for branching. It adds the
contents of the 16 or 24 LSBs of the instruction word to the PC register. The
assembler takes the

src (a label or address) specified by the user and generates

a displacement. If the branch is a standard branch, this displacement is equal to
[label

– (instruction address +1)]. If the branch is a delayed branch, this displace-

ment is equal to [label – (instruction address+3)].

The displacement is stored as a 16-bit or 24-bit signed integer in the LSBs of
the instruction word. The displacement is added to the PC during the pipeline
decode phase. Notice that because the PC is incremented by 1 in the fetch
phase, the displacement is added to this incremented PC value.

Syntax:

expr (

src)

Example 6–22 illustrates an example with data from before and after the
instruction is executed.

Example 6–22. PC-Relative Addressing

BU

NEWPC

; pc=1001h, NEWPC label = 1005h, displacement = 3

Before Instruction

After Instruction

decode phase:

execution phase:

PC

1002

PC

1005

The 24-bit addressing mode encodes the program-control instructions (for
example, BR, BRD, CALL, RPTB, and RPTBD). Depending on the instruc-
tion, the new PC value is derived by adding a 24-bit signed value in the
instruction word with the present PC value. Bit 24 determines the type of
branch (D = 0 for a standard branch or D = 1 for a delayed branch). Some of
the instructions are encoded in Figure 6–3.

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