Figure 3–11.interrupt and trap vector locations – Texas Instruments TMS320C3x User Manual

Page 78

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CPU Multiport Register File

3-15

CPU Registers

Figure 3–11.Interrupt and Trap Vector Locations

EA (ITTP) + 3Fh

EA (ITTP) + 3Eh

EA (ITTP) + 3Dh

EA (ITTP) + 3Ch

EA (ITTP) + 3Bh

EA (ITTP) + 20h

TRAP0

EA (ITTP) + 1Fh

EA (ITTP) + 0Dh

DINT1

EA (ITTP) + 0Ch

DINT0

EA (ITTP) + 0Bh

TINT1

EA (ITTP) + 0Ah

TINT0

EA (ITTP) + 09h

EA (ITTP) + 08h

EA (ITTP) + 07h

RINT0

EA (ITTP) + 06h

XINT0

EA (ITTP) + 05h

INT3

EA (ITTP) + 04h

INT2

EA (ITTP) + 03h

INT1

EA (ITTP) + 02h

INT0

EA (ITTP) + 01h

EA (ITTP) + 00h

TRAP31 (reserved)

TRAP30 (reserved)

TRAP29 (reserved)

TRAP28 (reserved)

TRAP27

Reserved

Reserved

Reserved

Reserved

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