Texas Instruments TMS320C3x - Manual (Page 430)

DMA Controller
12-51 Peripherals
After the completion of a block transfer, the DMA controller can be programmed
to do several things:
- Stop until reprogrammed (TC = 1)
- Continue transferring data (TC = 0)
- Generate an interrupt to signal the CPU that the block transfer is complete
(TCINT = 1)
The DMA can be stopped by setting the START bits to 00, 01, or 10. When the
DMA is restarted (START = 11), it completes any pending transfer.
Figure 12–34. DMA Basic Operation
Memory pointed to by DMA
source-address register
Memory pointed to by DMA
destination-address register
DMA
channel
Temporary register
External or Internal
memory
External or Internal
memory
12.3.3 DMA Registers
Each DMA channel has four registers designated as follows:
- Control register: contains the status and mode information about the
associated DMA channel
- Source-address register: contains the memory address of data to be
read
- Destination-address register: contains the memory address where data
is written
- Transfer-counter register: contains the block size to move
After reset, the control register, the transfer counter, and the auxiliary transfer-
counter registers are set to 0s and the other registers are undefined.
Figure 12–36 shows these registers for ’C30 and ’C31. Figure 12–37 shows
these registers for ’C32.
The format of the DMA-channel control register is shown in Figure 12–35. The
text following the figure describes the functions of each field in the register.