Dma initialization/reconfiguration, Hints for dma programming – Texas Instruments TMS320C3x User Manual

Page 452

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DMA Controller

12-73

Peripherals

12.3.9 DMA Initialization/Reconfiguration

You can control the DMA through memory-mapped registers located on the
dedicated peripheral bus. Following is the general procedure for initializing
and/or reconfiguring the DMA:

1) Halt the DMA by clearing the START bits of the DMA global-control register.

You can do this by writing a 0 to the DMA global-control register. The DMA
is halted on RESET.

2) Configure the DMA through the DMA global-control register (with

START = 00), as well as the DMA source, destination, and transfer-
counter registers, if necessary. Refer to Section 12.3.11 on page 12-74
for more information.

3) Start the DMA by setting the START bits of the DMA global-control register

as necessary.

12.3.10

Hints for DMA Programming

The following hints help you to improve your DMA programming and avoid un-
expected results:

-

Reset the DMA register before starting it. This clears any previously
latched interrupt that may no longer exist.

-

In the event of a CPU-DMA access conflict, the CPU always prevails. Care-
fully allocate the different sections of the program in memory for faster
execution. If a CPU program access conflicts with a DMA access, enabling
the cache helps if the program is located in external memory. DMA on-chip
access happens during the H3 phase.

Note:

Expansion and Peripheral Buses

The expansion and peripheral buses cannot be accessed simultaneously
because they are multiplexed into a common port (see Figure 2–1 on
page 2-3). This might increase CPU-DMA access conflicts.

-

Ensure that each interrupt is received when you use interrupt synchroniza-
tion; otherwise, the DMA will never complete the block transfer.

-

Use read/write synchronization when reading from or writing to serial ports
to guarantee data validity.

The following are indications that the DMA has finished a set of transfers:

-

The DINT bit in the IF register is set to 1 (interrupt polling). This requires
that you set the TCINT bit in the DMA control register first. This interrupt-
polling method does not cause any additional CPU-DMA access conflict.

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