Nested block repeats – Texas Instruments TMS320C3x User Manual

Page 192

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Repeat Modes

7-8

7.1.7

Nested Block Repeats

Block repeats (RPTB) can be nested. Since the registers RS, RE, RC, and
ST control the repeat-mode status, these registers must be saved and restored
in order to nest block repeats. For example, if you write an interrupt service routine
that requires the use of RPTB, it is possible that the interrupt associated with the
routine may occur during another block repeat. The interrupt service routine can
check the RM bit to determine whether the block repeat mode is active. If this RM
is set, the interrupt routine must save ST, RS, RE, and RC, in that order. The inter-
rupt routine can then perform a block repeat. Before returning to the interrupted
routine, the interrupt routine must restore RC, RE, RS, and ST, in that order. If the
RM bit is not set, you do not need to save and restore these registers.

Note:

Saving/Restoring Registers in Correct Order

The order in which the registers are saved/restored is important to guarantee
correct operation. The ST register must be restored last, after the RC, RE,
and RS registers. ST must be restored after restoring RC, because the RM
bit cannot be set to 1 if the RC register is 0 or –1. For this reason, if you
execute a POP ST instruction (with ST (RM bit) = 1) while RC = 0, the POP
instruction recovers all the ST register bits but not the RM bit that stays at 0
(repeat mode disabled). Also, RS and RE must be correctly set before you
activate the repeat mode.

The RPTS instruction can be used in a block repeat loop if the proper registers
are saved.

Because the program counter is modified at the end of the loop according to the
contents of registers RS, RE, and RC, no operation should attempt to modify
the repeat counter or the program-counter to a different value at the end of the
loop. It takes four cycles in the pipeline to save and restore these registers.
Hence, sometimes, it may be more economical to implement a nested loop by
the more traditional method of using a register as a counter and then using a
delayed branch or a decrement and branch-delayed instructions, rather than
using nested repeat blocks. Often implementing the outer loop as a counter and
the inner loop as RPTB instruction produces the fastest execution.

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